1. Field of the Invention
The invention presented herein relates to tone detection circuitry and in particular to tone detection circuitry providing for the detection of a plurality of tone signals.
2. BACKGROUND ART
Integrated phase locked loop tone decoder circuits, such as those available from Signetics, Inc. under the type designation NE567, are well known. Such circuits require the user only to add two filter capacitors, a timing capacitor and a timing resistor. The timing capacitor and timing resistor determine the free running or center frequency of the circuit at which it operates in the absence of an input signal within the detection bandwidth of the circuit. Such integrated circuits provide for a maximum detection bandwidth of approximately 14% of the center frequency. Use of the integrated circuits in this manner, requires the use of an adjustable potentiometer as a part of the timing resistance, since timing components, including the integrated circuit itself, limit the center frequency accuracy to .+-.10 to 30%. Also, once the center frequency is set, only signals within the circuit bandwidth for that center frequency may be detected so a different integrated circuit is normally used for each tone to be detected. In addition, since the timing components are influenced by various factors such as time, temperature and supply voltage, several readjustments on the potentiometer may be required over the life of the circuit. With such an arrangement, the bandwidth provided is too great for some applications. An improved tone detection circuit arrangement was developed for the detection of a tones for each of a plurality of bandwidths wherein a number of selectively connectable timing resistors were used with their connection in parallel to the integrated tone decoder circuit controlled by a counter. The counter automatically switched the various resistors in parallel to the integrated tone decoder to establish new free running frequencies for the integrated tone decoder circuit. Upon receipt of a tone within an existing detection bandwidth, the integrated tone decoder circuit locks in on the frequency of the detected tone. A program was provided for monitoring the lock indicator output of the integrated tone decoder circuit. When a lock indicator output was produced, the circuitry measured the locked frequency of the integrated tone detector circuit and compared it to information regarding various tone frequencies to be detected to determine whether a desired tone frequency had been detected. While this improved arrangement reduced the number of integrated tone decoder circuits needed for detection of a plurality of tones and allowed the bandwidth for an acceptable tone to be narrowed, the arrangement is not acceptable for use in situations where the duration of the tone signals to be detected are about the same or less than the time required to connect the various timing resistors to the integrated tone decoder. In addition, in situations where there are certain times when the various desired tones are expected, this prior art arrangement can lock on a tone that is not being sought at a particular time and miss the detection of a tone that is sought.